1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device using thin film transistors (TFTs) formed on a transparent substrate made of glass, plastic, or the like and a driving method thereof. In addition, the present invention relates to electronic equipment using the liquid crystal display device.
2. Description of the Related Art
In recent years, mobile telephones have become widespread due to development of communication technology. In future, moving picture transmission and a larger amount of information transfer are further expected. With respect to a personal computer, products for mobile applications are manufactured due to a reduction in weight thereof. A large number of information terminals called PDAs started with electronic notebooks are also manufactured and becoming widespread. In addition, with the development of display devices and the like, most of portable information devices are equipped with a flat panel display.
According to recent techniques, an active matrix display device tends to be used as a display device used therefor. In the active matrix display device, a TFT is arranged in each pixel and a screen is controlled by the TFTs. Compared to a passive matrix display device, such an active matrix display device has advantages in that it achieves high performance and high image quality and can handle moving pictures. Thus, it is considered that mainstream liquid crystal display devices will also change from passive matrix types to active matrix types.
Also, of active matrix display devices, in recent years, commercialization of a display device using low temperature polysilicon is progressing. With low temperature polysilicon, not only the pixels but also the driver circuit can be integrally formed on the periphery of the pixel portion, and as miniaturization and high definition of the display device is possible, it is expected that the display device using low temperature polysilicon will become even more widespread.
A description is given below on the operation of a pixel portion in an active matrix liquid crystal display device. FIG. 3 shows an example of the structure of an active matrix liquid crystal display device. One pixel 302 is composed of a source signal line S1, a gate signal line G1, a capacitance line C1, a pixel TFT 303, and storage capacitor 304. The capacitance line is not always necessary if other wire can double as the capacitance line. A gate electrode of the pixel TFT 303 is connected to the gate signal line G1. One of a drain region and a source region of the pixel TFT 303 is connected to the source signal line S1 whereas the other is connected to the storage capacitor 304 and a pixel electrode 305.
Gate signal lines are selected sequentially in accordance with line cycle. If the pixel TFT is an n-channel TFT, setting the gate signal line Hi renders the line active and turns the pixel TFT ON. As the pixel TFT is turned ON, the electric potential of the source signal line is written in the storage capacitor and in a liquid crystal. In the next line period, the adjacent gate signal line becomes active and the electric potential of the source signal line is written in the storage capacitor and the liquid crystal in a similar fashion.
Described next is the operation of a source line driving circuit. FIG. 2 shows an example of a conventional source signal line driving circuit. The source signal line driving circuit in FIG. 2 is for analog type dot sequential driving. In this example, the source signal line driving circuit is composed of a shift register 201, a NAND circuit 207, a buffer circuit 208, and an analog switch 209. First, a source start pulse SSP is inputted to the first stage of the shift register through a switch 206. The switch 206 determines the scanning direction of the shift register. Scanning is made from left to right in FIG. 2 when SL/R is Lo and from right to left when SL/R is Hi. A DFF 202 constitutes each stage of the shift register. The DFF 202 is composed of clocked inverters 203 and 204 and an inverter 205, and shifts pulses each time clock pulses CL and CLb are inputted.
Output of the shift register is inputted to the buffer circuit 208 through the NAND circuit 207. Output of the buffer circuit turns the analog switches 209 to 212 ON for sampling of video signals directed to source signal lines S1 to S4.
A middle- or small-sized liquid crystal panel can be operated by the dot sequential driving described above. However, in a large-sized liquid crystal panel, dot sequential driving cannot provide sufficient time for writing of source signal lines because the wire capacitance of the source signal lines is about 100 pF and delay time of the source signal lines themselves is too great. Then, it becomes impossible to perform writing. Therefore, a large-sized panel needs linear sequential driving in which data is temporarily stored in a memory within the source signal line driving circuit and then written in a source signal line during the next one line period.
Such linear sequential driving needs analog buffer circuits placed downstream of the memory. An example of a source signal line driving circuit adaptable to linear sequential driving is shown in FIG. 4. Analog switches 401 to 404 operate in the same way as the analog switches do in the dot sequential source signal line driving circuit shown in FIG. 2. Unlike FIG. 2 where the analog switches drive source signal lines, the analog switches 401 to 404 drive capacitors 405 to 408, which serve as analog memories. As one line of data are sequentially stored in the analog memories, TRN and TRNb signals become active in the next retrace period to turn analog switches 409 to 412 ON. This starts transfer of the data in the analog memories 405 to 408 to analog memory capacitors 413 to 416.
Then, the analog switches 409 to 412 are turned OFF before the analog switches 401 to 404 are turned ON in preparation for the next sampling. The data in the analog memories 413 to 416 are outputted to source signal lines S1 to S4 through the analog buffer circuits 417 to 420. The data in the analog memories 413 to 416 are kept for one line period and therefore analog buffer circuits 417 to 420 are allowed to take one line period to charge the source lines. In this way, linear sequential driving in a large-sized panel is made possible by analog memories and analog buffer circuits.
However, when analog buffer circuits in a large-sized panel are constituted of TFTs, fluctuation among the analog buffer circuits is a problem. Fluctuation among the analog buffer circuits causes output fluctuation even though video signals of the same gray scale are inputted. As a result, vertical streaks appear on the screen lowering the image quality considerably.
When low temperature polycrystalline silicon is used to manufacture a liquid crystal display device, a driver circuit is integrally formed. However, transistors of this driver circuit are more fluctuated than those in a driver circuit that is formed of single crystal silicon. This is supposedly due to uneven crystallization and damage by electrostatic during the process. When a driving circuit is formed taking into consideration such fluctuation, the fluctuation is more obvious in a component that conducts analog operation, in particular, analog buffer circuits, than in the logic portion.
In the conventional source signal line driving circuit shown in FIG. 4, a voltage difference between the output voltage of each analog buffer circuit and the average of output of plural analog buffer circuits is obtained. A voltage difference between the mean output value and an analog buffer circuit output A is given as ΔVA. Similarly, voltage differences between the mean output value and analog buffer circuit outputs B, C, and D are given as ΔVB, ΔVC, and ΔVD, respectively. When ΔVA is +100 mV, ΔVB is −100 mV, ΔVC is −50 mV, and ΔVD is +30 mV, the difference between the source signal lines S2 and S3 is 50 mV whereas the difference between the source signal lines S1 and S2 is 200 mV, which is large enough for human eyes to recognize the gray scale difference.